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Application Note 9762
cutoffs. This is the type of single-ended to differential
conversion circuitry that is provided on the HI5767EVAL2
evaluation board (refer to the HI5767EVAL2 evaluation board
parts layout and the electrical schematics).
The HI5767EVAL2 evaluation board provides the single-
ended to differential analog front-end for converting the
typical laboratory signal generators 50 ? single-ended output
to a differential input signal for the converters differential-in-
differential-out sample-and-hold front end. The input of this
analog front-end, RF SMA connector J1, is AC coupled and
provides a termination impedance of 50 ? .
The Mini-Circuits T4-1 transformer, T1, provides a 1dB
passband from 2MHz to 100MHz. Since this transformer has a
1:4 primary to secondary impedance ratio the 200 ? secondary
impedance, created by the series resistance of R9 and R10, is
now transformed to 50 ? at the transformer primary side
(200/4 = 50).
point where the power supplies enter the board, DO NOT tie
them together back at the power supplies.
The analog and digital supplies are also kept separate on
the evaluation board and should be driven by clean linear
regulated supplies. The external power supplies are hooked
up with the twisted pair wires soldered to the plated through
holes marked +5VAIN, +5VA1IN, -5VAIN, +5VDIN,
+5VD1IN, +5VD2IN, AGND and DGND near the prototyping
area. +5VDIN, +5VD1IN and +5VD2IN are digital supplies
and are returned to DGND. +5VAIN, +5VAIN1 and -5VAIN
are the analog supplies and are returned to AGND. Table 1
lists the operational supply voltages, typical current
consumption and the evaluation board circuit function being
powered. Single supply operation of the converter is
possible but the overall performance of the converter may
degrade.
TABLE 1. HI5767EVAL2 EVALUATION BOARD POWER SUP-
PLIES
Alternate transformers could be used with minor modifications
to the input circuit. For example, if one desired a narrower input
frequency range than that provided by the Mini-Circuits T4-1
transformer one could replace the T4-1 with a Mini-Circuits
TMO2.5-6T. The TMO2.5-6T transformer provides a 1dB
passband from 0.05MHz to 20MHz and has a 1:2.5 primary to
secondary impedance ratio. With this, the 200 ? secondary
load (two 100 ? resistors, R9 and R10, connected across the
transformer secondary) is now transformed to 80 ?
(200/2.5 = 80) at the transformer primary side input. In order to
achieve a 50 ? input impedance at the analog input connector,
J1, it would be necessary to install a 130 ? resistor in the R3
POWER
SUPPLY
+5VAIN
-5VAIN
+5VA1IN
+5VDIN
NOMINAL
VALUE
5.0V ± 5%
-5.0V ± 5%
5.0V ± 5%
5.0V ± 5%
CURRENT
(TYP)
6mA
5mA
50mA
63mA
FUNCTION(S)
SUPPLIED
External Reference
Voltage Operational
Amplifier, Bandgap
Reference
External Reference
Voltage Operational
Amplifier
A/D AV CC
Sample Clock
(A/R) location, i.e., the impedance now seen looking into the J1
Generation
SMA connector is 130 ? (R3) in parallel with 80 ? for an
effective impedance of 50 ? .
+5VD1IN
+5VD2IN
5.0V ± 5%
3.0V ± 10%
20mA
5mA
A/D DV CC1
A/D DV CC2
When using transformer coupling, care should be exercised
in the area of impedance matching or undesirable distortion
components could result from mismatching and affect the
overall measured performance of the converter.
Evaluation Board Layout and Power
Supplies
The HI5767 evaluation board is a four layer board with a
layout optimized for the best performance of the converter.
This application note includes an electrical schematic of the
evaluation board, a component parts list, a component
placement layout drawing and reproductions of the various
board layers used in the board stack-up. The user should
feel free to copy the layout in their application.
The HI5767 monolithic A/D converter has been designed
with separate analog and digital supply and ground pins to
keep digital noise out of the analog signal path. The
evaluation board provides separate low impedance analog
and digital ground planes on layer 2. Since the analog and
digital ground planes are connected together at a single
Sample Clock Driver
In order to ensure rated performance of the HI5767, the duty
cycle of the sample clock should be held at 50% ± 5%. It must
also have low phase noise and operate at standard TTL levels.
It can be dif?cult to ?nd a low phase noise generator that will
provide a 60MHz squarewave at TTL logic levels.
Consequently, the HI5767EVAL2 evaluation board is
designed with a logic inverter (U5) acting as a voltage
comparator to generate the sampling clock for the HI5767
when a sinewave (< ± 1.5V) is applied to the AC-coupled, 50 ?
terminated CLK input through SMA type RF connector, J2,
of the evaluation board. The sample clock sinewave is AC
coupled into the input of the inverter and a discrete bias tee
is used to bias the sinewave around the trigger level of the
inverter’s input. A potentiometer (VR2) varies the DC bias
voltage added to the sinewave input allowing the user to
adjust the duty cycle of the sampling clock to obtain the best
performance from the ADC and to evaluate the effects of
sample clock duty cycle on the performance of the converter.
The trigger level for the sample clock input to the HI5767
3-3
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